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 DM74AS640 3-STATE Octal Bus Transceiver
October 1986 Revised March 2000
DM74AS640 3-STATE Octal Bus Transceiver
General Description
This advanced Schottky device contains 8 pairs of 3STATE logic elements configured as octal bus transceiver. This circuit is designed for use in memory, microprocessor systems and in asynchronous bidirectional data buses. This device transmits data from the A bus to the B bus, or vice versa, depending upon the logic level of the direction control input (DIR). The enable input (G) can be used to disable the devices, effecting isolation of buses A and B. The 3-STATE circuitry also contains a protection feature that prevents these transceivers from glitching the bus during power-up or power-down.
Features
s Switching specifications at 50 pF s Switching specifications guaranteed over full temperature and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL process s Functionally and pin for pin compatible with Schottky, low power Schottky, and advanced low power Schottky TTL counterpart s Improved AC performance over Schottky, low power Schottky, and advanced low power Schottky counterparts s 3-STATE outputs independently controlled on A and B buses s Low output impedance drive to drive terminated transmission lines to 133 s Specified to interface with CMOS at VOH = VCC - 2V
Ordering Code:
Order Number DM74AS640WM DM74AS640N Package Number M20B N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Function Table
Control Inputs Operation G L L H
H = HIGH Logic Level L = LOW Logic Level X = Immaterial
DIR L H X B Data to A Bus A Data to B Bus Isolation
Logic Diagram
Top View
(c) 2000 Fairchild Semiconductor Corporation
DS006708
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DM74AS640
Absolute Maximum Ratings(Note 1)
Supply Voltage Input Voltage Control Inputs I/O Ports Operating Free Air Temperature Range Storage Temperature Range Typical JA N Package M Package 51.5C 69.0C 7V 5.5V 0C to +70C -65C to +150C
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation.
7V
Recommended Operating Conditions
Symbol VCC VIH VIL IOH IOL TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Free Air Operating Temperature 0 Parameter Min 4.5 2 0.8 -15 64 70 Typ 5 Max 5.5 Units V V V mA mA C
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH Parameter Input Clamp Voltage HIGH Level Output Voltage VOL II IIH IIL IO ICCH ICCL ICCZ LOW Level Output Voltage Input Current at Max Input Voltage HIGH Level Input Current LOW Level Input Current Output Drive Current Supply Current with Outputs HIGH Supply Current with Outputs LOW Supply Current with Outputs in 3-STATE
Note 2: All typicals are at VCC = 5.0V, TA = 25C. Note 3: For I/O ports, the parameters IIH and IIL include the OFF-State output current, IOZH and IOZL.
Conditions VCC = Min, II = -18 mA VCC = 4.5V to 5.5V, IOH = -2 mA VCC = 4.5V, IOH = -3 mA VCC = 4.5V, IOH = Max VCC = Min, IOL = Max VCC = Max, VI = 7V, (VI = 5.5V for A or B Ports) VCC = Max VI = 2.7V (Note 3) VCC = Max, VI = 0.4V (Note 3) VCC = Max, VO = 2.25V VCC = Max Control Inputs A or B Ports Control Inputs A or B Ports
Min
Typ (Note 2)
Max -1.2
Units V V V V
VCC - 2 2.4 2.4 0.35 0.55 0.1 20 70 -0.5 -0.75 -50 37 78 51 -150 58 123 80
V mA A mA mA mA mA mA
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2
DM74AS640
Switching Characteristics
over recommended operating free air temperature range (unless otherwise noted) From Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ Parameter Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Output Enable Time to HIGH Level Output Output Enable Time to LOW Level Output Output Disable Time from HIGH Level Output Output Disable Time from LOW Level Output (Input) To (Output) VCC = Min to Max, CL = 50 pF, R1 = R2 = 500 Min A or B A or B B or A B or A 2 2 Max 7 6 ns ns Units
G
A or B
2
8
ns
G
A or B
2
10
ns
G
A or B
2
8
ns
G
A or B
2
13
ns
3
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DM74AS640
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B
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4
DM74AS640 3-STATE Octal Bus Transceiver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 5 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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